TECHNICAL CONTENT

MCP

ROBUST PARTITIONING IS DEAD – WHAT NOW?

Picture of Tim Loveless | Principal Solutions Architect

Tim Loveless | Principal Solutions Architect: Oct 19, 2022 2:00:48 PM

Multicore safety research from Barcelona Supercomputer Centre (BSC) says that a robustly partitioned hardware and software platform is practically impossible. With today’s multicore processors (MCPs), current RTOS, and hypervisor technology Dr.... Read More

Introducing the Z-Application-Bridging the gap between bare metal and rtos

LYNX Software Technologies: Aug 12, 2021 12:06:18 PM

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Single Root I/O Virtualization (SR-IOV) -Pt 2- LynxOS-178 10G network benchmarkS

Tim Loveless | Principal Solutions Architect: Mar 16, 2021 12:33:11 PM

_______________ Single Root I/O Virtualization (SR-IOV) virtualizes network interface cards (NICs) to allow a single NIC to present itself as dozens of virtual NICs to a hypervisor. It is a hardware standard, part of the PCI-SIG (Peripheral... Read More

Who Needs a Hypervisor?

Tim Loveless | Principal Solutions Architect: Feb 25, 2021 12:59:58 PM

_______________ The standard benefits of a hypervisor are well known and often touted. Every RTOS has its hypervisor and they do genuinely help embedded designers to: Partition multicore processors into virtual machines; an elegant way to... Read More

What is Cache Coloring and How Does it Work?

Tim Loveless | Principal Solutions Architect: Feb 5, 2021 11:52:40 AM

_______________ There are substantial challenges in building secure and safe systems on multicore processors (MCPs). Last level cache contention is undoubtedly the largest source of multicore interference, and a significant challenge for real-time... Read More

Challenges Building Safe Multicore Systems

Tim Loveless | Principal Solutions Architect: Jun 15, 2020 8:12:09 AM

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What Is A Separation Kernel?

Tim Loveless | Principal Solutions Architect: Mar 22, 2020 12:02:33 PM

_______________ Having built both separation kernels and real-time operating systems—and supported customers using both across a wide range of industries—we are familiar with the pros and cons of each software technology, as well as their security,... Read More

Field Notes: Safety-Critical Systems Symposium 2020

Tim Loveless | Principal Solutions Architect: Feb 24, 2020 12:34:50 PM

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TC-16/51: Adding Bottom Up Interference Analysis for MCPs

Picture of Mark Brown | Systems Architect

Mark Brown | Systems Architect: Jan 28, 2020 2:20:00 PM

_______________ I hadn't heard of "bottom up" avionics certification before I read FAA's TC-16/51. But now, looking back at it, I think the authors from Thales Avionics, including Xavier Jean, PhD, proposed a big change in perspective. In their... Read More

Lynx & ENSCO Demonstrate Avionics Solutions at DSEI JAPAN 2019

Picture of Dan Westerberg | Senior Systems Engineer

Dan Westerberg | Senior Systems Engineer: Nov 18, 2019 2:29:00 PM

_______________ The most formidable challenges of modern avionics development programs are often centered around the safety certification process and the corresponding requirements and costs. Equally as challenging to any large development program... Read More

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