EMBEDDED BEST PRACTICES DEMONSTRATED AT ARM TECHCON 2019
Preview: Minimize Your Trusted Codebase "What is a trusted codebase? In a security context, it’s determined by the security level that the component must reach. For example, whether a component has to work at a security level that is secret or top secret. In a safety-critical context, it’s determined by the safety-criticality level that the component must achieve. For example, whether a component has to work at DO-178C DAL C, or DAL A. A benefit of decomposing your architecture with a separation kernel is the ability to minimize your trusted codebase. For example, you don’t want to be forced..."
Principal Solutions Architect
WHAT IS SR-IOV AND WHY IS IT IMPORTANT FOR EMBEDDED DEVICES?
Preview: "Single Root I/O Virtualization (SR-IOV) is the technical name for a technology beginning to find its way into embedded devices. SR-IOV is a hardware standard that allows a PCI Express device – typically a network interface card (NIC) – to present itself as several virtual NICs to a hypervisor. The standard was written in 2007 by thePCI-SIG(Peripheral Component Interconnect - Special Interest Group) with key contributions from Intel, IBM, Hewlett-Packard, and Microsoft (among others). We can thank the PCI-SIG for the interoperability of the vast range of computer PCI add-in cards and Intel’s famous — in tech circles — 8086 hardware vendor ID that PCI devices report on the bus..."
Preview: "The complexity of today’s automobiles is increasing with every new model on the market. A modern car can contain hundreds of electronic control units and with connectivity and autonomy becoming commonplace, this is increasing dramatically as we enter the 2020s. Many of these systems up until a few years ago have safely run on microcontrollers on an unsecured vehicle network, and this has been fine; the networks were ‘air-gapped’ from the rest of the world, and the risk of a malicious attacker causing any kind of danger to a car’s occupants by directly plugging in a new device was as likely as someone cutting the brake lines. The automotive industry on the whole were happy with this risk..."
Principal Field Applications Engineer
FIELD NOTES — SEPTEMBER 2019 FACE™ TIM
Preview: "Last week I was able to spend several days at the Open Group Future Airborne Capability Environment (FACE™) Technical Interchange Meeting (TIM) and consortium meetings. For those who are not familiar with either the Open Group or FACE™, the Open Group is a global consortium of hundreds of tool vendors, systems integrators, academics, researchers, and consultants aimed at developing open, vendor-neutral technology standards and certifications for various industries, including Defense & Aerospace..."
Principal Solutions Architect
MULTI-CORE CACHE ALLOCATION TECHNOLOGY DEMO
Preview: "This week saw LYNX’s cache partitioning feature for Lynx MOSA.ic™ demonstrated for the first time at the Collins Aerospace Embedded Computing Conference in Cedar Rapids, Iowa. Cache partitioning is a new feature of Lynx MOSA.ic™ released in September 2019 and based on Intel’s Cache Allocation Technology (CAT) CPU hardware feature. CAT has been available in Intel chips since 2015. Together with Cache Monitoring Technology (CMT) and Memory Bandwidth Monitoring (MBM), CAT forms a suite of hardware features aimed at mitigating the "noisy neighbor" problem..."
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