4 min read

TC-16/51: Adding Bottom Up Interference Analysis for MCPs

By Mark Brown | Systems Architect on Jan 28, 2020 7:54:00 AM

I hadn't heard of "bottom up" avionics certification before I read FAA's TC-16/51.  But now, looking back at it, I think the authors from Thales Avionics, including Xavier Jean, PhD, proposed a big change in perspective.  In their own words, here's their proposal to add "bottom up" analysis to aircraft safety certifications on Multi-Core Processors (MCP):

Topics: Avionics Multicore FAA Safety TC-16/51 CAST-32A Certification MCP
6 min read

Lynx & ENSCO Demonstrate Avionics Solutions @ DSEI JAPAN 2019

By Dan Westerberg on Nov 17, 2019 7:53:00 AM

The most formidable challenges of modern avionics development programs are often centered around the safety certification process and the corresponding requirements and costs. Equally as challenging to any large development program are the design and implementation phases where the software application comes to life as it is realized on the target system environment. These phases can be compromised by:

Topics: Demo Lynx MOSA.ic™ Events Embedded Blog Multicore FAA Safety Certification MCP Systems Architecture
10 min read

Embedded Best Practices Demonstrated at Arm Tech-con

By James Deutch on Oct 17, 2019 7:53:00 AM

Lynx participated in this year’s Arm TechCon with a booth in the expo hall, where we demoed Lynx MOSA.ic and its components — LynxSecure®, Buildroot Linux, LynxOS-178®, and Lynx Simple Applications (which are bare-metal apps).  It was great to see people walk down the hallways and stop in the aisle to examine the Automotive demo and Industrial demo.

The concepts behind the demos apply across multiple industries and use cases; we simply chose to highlight these concepts in the context of these two markets for the purpose of putting together the demos.  For more information on the Automotive demo, you can read Chris Barlow's blog post.  Below you can see a close-up of the architectural graphic shown on the notebook’s screen:

Topics: Demo Lynx MOSA.ic™ Embedded Blog Least Privilege Systems Architecture Arm Tech Con Security Trusted Codebase
5 min read

What is SR-IOV and Why is It Important for embedded devices?

By Tim Loveless on Oct 10, 2019 7:51:00 AM

Topics: Multi-core Avionics Demo Cache-partitioning Lynx MOSA.ic™ Embedded Blog Safety MCP Systems Architecture
6 min read

Realizing modern Automotive Software Environments

By Chris Barlow on Oct 9, 2019 7:52:00 AM

The complexity of today’s automobiles is increasing with every new model on the market.  A modern car can contain hundreds of electronic control units and with connectivity and autonomy becoming commonplace, this is increasing dramatically as we enter the 2020s.  Many of these systems up until a few years ago have safely run on microcontrollers on an unsecured vehicle network, and this has been fine; the networks were ‘air-gapped’ from the rest of the world, and the risk of a malicious attacker causing any kind of danger to a car’s occupants by directly plugging in a new device was as likely as someone cutting the brake lines.  The automotive industry on the whole were happy with this risk.

4 min read

Field Notes: Sept 2019 Face™ TIM

By James Deutch on Sep 24, 2019 7:53:00 AM

Last week I was able to spend several days at the Open Group Future Airborne Capability Environment (FACE™) Technical Interchange Meeting (TIM) and consortium meetings.  For those who are not familiar with either the Open Group or FACE™, the Open Group is a global consortium of hundreds of tool vendors, systems integrators, academics, researchers, and consultants aimed at developing open, vendor-neutral technology standards and certifications for various industries, including Defense & Aerospace.

Topics: Multi-core Future Airborne Capabilities Environment (FACE™) FACE TIM
3 min read

Multi-core cache allocation technology (CAT) demo

By Tim Loveless on Sep 20, 2019 7:51:00 AM

This week saw LYNX’s cache partitioning feature for Lynx MOSA.ic™ demonstrated for the first time at the Collins Aerospace Embedded Computing Conference in Cedar Rapids, Iowa. Cache partitioning is a new feature of Lynx MOSA.ic™ released in September 2019 and based on Intel’s Cache Allocation Technology (CAT) CPU hardware feature.

Topics: Demo Cache-partitioning Lynx MOSA.ic™ Embedded Blog Multicore Safety MCP Systems Architecture Cache Allocation Technology