Lynx will be exhibiting on booth #516 at Arm TechCon in Santa Clara from October 25th – 26th 2017.
This year we will demonstrating the LynxSecure Separation Kernel Hypervisor running on a Xilinx UltraScale+ MPSoC. The demonstration will show a mixed criticality system, with LynxSecure running across the Cortex A53 processors, providing secure domains to host a safety-critical RTOS running next to Linux domains executing general purpose computing applications. Any fault conditions or threats that manifest in the GPOS domains cannot affect or compromise the applications running in the safety domain which maintains its deterministic behavior regardless of the performance of the rest of the system.
Technology experts from Lynx will be on hand to demonstrate LynxSecure and answer technical questions about this unique security platform that is now available for the ARM architecture.
For more information on LynxSecure for the Arm architecture please
Download PDF brochure.